1. Technical Field
The present subject matter is generally directed to the manufacture and packaging of integrated circuit devices, and, more particularly, to a method of forming a temporary carrier structure and associated release techniques.
2. Description of the Related Art
There is a constant drive within the semiconductor industry to increase the operating speed of integrated circuit devices, e.g., microprocessors, memory devices, and the like. This drive is fueled by consumer demands for computers and electronic devices that operate at increasingly greater speeds. This demand for increased speed has resulted in a continual reduction in the size of semiconductor devices, e.g., transistors. That is, many components of a typical field effect transistor (FET), e.g., channel length, junction depths, gate insulation thickness, and the like, are reduced. For example, all other things being equal, the smaller the channel length of the transistor, the faster the transistor will operate. Thus, there is a constant drive to reduce the size, or scale, of the components of a typical transistor to increase the overall speed of the transistor, as well as integrated circuit devices incorporating such transistors. Moreover, there is a constant demand to increase the packing density of integrated circuit devices such that the overall size of the consumer product employing such devices is reduced.
Generally, semiconductor wafers used in manufacturing integrated circuit devices, e.g., memory devices, microprocessors, etc., have traditionally had a diameter of approximately 200 mm and a thickness of about 750-1000 μm. Larger diameter wafers, e.g., 300 mm, are being used as well. In manufacturing integrated circuit devices, only a small portion of the overall thickness of the semiconductor wafer is actually used for the operational integrated circuit devices. For example, the junction depth on many modern integrated circuit devices may be 20 μm or less. Relatively thin substrates have been employed in manufacturing modern integrated circuit devices. However, handling and processing of such thin substrates can be problematic due to the lack of mechanical strength and rigidity inherent in such thin substrates.
The present subject matter is directed to a device and various methods that may solve, or at least reduce, some or all of the aforementioned problems.
While the subject matter described herein is susceptible to various modifications and alternative forms, specific embodiments thereof have been shown by way of example in the drawings and are herein described in detail. It should be understood, however, that the description herein of specific embodiments is not intended to limit the invention to the particular forms disclosed, but on the contrary, the intention is to cover all modifications, equivalents, and alternatives falling within the spirit and scope of the invention as defined by the appended claims.